A simple proof of unitary parallelization via port-based teleportation

arXiv:2610.30761 · quant-ph · Submitted 2026-10-22 · Read on arXiv

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Introduction to the show: ident: Quantum Radio. Generated commentary on the latest quantum physics and condensed matter papers.

Kai: We're looking at the paper: "A simple proof of unitary parallelization via port-based teleportation".

Mira: Here's the gist of the paper. This note provides an elementary efficient circuit for port-based teleportation (PBT) with polylogarithmic depth, which serves as a simple proof that all n-qubit unitaries can be parallelized to poly(n) depth.

Kai: Port-Based Teleportation (PBT) Port-based teleportation is a variant of quantum teleportation where Alice performs a measurement and informs Bob which of his N ‘ports’ to retrieve the state, up to infidelity decaying with N<ref:2610.30761#pg2>.

Mira: This method differs from ordinary teleportation by having Alice measure the input jointly with her halves of N shared pairs and report a port label i, while Bob keeps Bi and discards the other ports, with no correction on the retained state<ref:2610.30761#pg3>.

Kai: The paper reports an elementary PBT circuit with depth polylog(N, d), in contrast to existing efficient circuits which have poly(N, d) depth and are more complex due to heavy reliance on representation theory<ref:2610.30761#pg3>.

Title and authors: Kai: So we’re looking at "A simple proof of unitary parallelization via port-based teleportation." This paper tackles how to build a circuit that can handle any arbitrary n-qubit unitary, which is usually hard because of the exponentially growing width you need Kai. Mira, what’s the main takeaway for us right now?

Mira: The core idea here is this port-based teleportation, or PBT, which lets Alice measure and tell Bob which of N ports to use to retrieve his state without having to do any complex corrections on the state she keeps Mira. It shows that instead of needing heavy representation theory tools for these kinds of circuits, we can get away with something much simpler Mira.

Lev: From an engineering standpoint, the promise here is that this method could lead to a way to implement those complex unitary transformations in parallel, which is what we really need for real hardware scaling Lev. But how does this specific protocol actually work?

Kai: Well, the paper proposes using a single reflection operator on Alice's registers to achieve this PBT Kai. They define a target state omega⟩ that they are approximating with a measurement outcome, which is essentially replacing the usual complex Naimark dilation with something much more straightforward Kai.

Mira: That target state looks like omega⟩ equals d over the square root of N times a sum over N terms involving flag states and EPR pairs Mira. It seems they define a reflection operator Rf that maps the input state Ψ⟩ to this target state omega⟩, and then we use that to implement the PBT Mira.

Lev: Implementing that reflection operator is where I get cautious. They introduce a superposition state, β⟩, and an operator Sf based on it Lev. The choice of the parameter mu equals N over d squared is crucial because it gives them a bound on how much their channel T f deviates from the identity Lev.

Kai: So they show that this channel T f has a diamond-norm error bounded by two times d squared minus one over N plus delta, where delta is some small value Kai <ref:2610.30761#pg2>. That error depends on N and d, which are the number of ports and the local dimension of the state space Kai.

Mira: And that bound is important because it directly connects to what they need for quantum simulation or variational algorithms; it shows that entanglement infidelity can be controlled with a specific structure derived from these N independent Choi states Mira. But this still leaves us wondering if this fidelity holds up when we start talking about large n qubits Mira.

Title and authors: Lev: It does hold up in the proof, but running this on real hardware means we have to worry about how much overhead the measurement and preparation of those N independent Choi states puts on our error correction budget Lev. The paper does show that these states can be prepared in parallel, but scaling that preparation process is where the practical difficulty lies Lev.

Kai: So, if we follow their corollary, it says for any n-qubit unitary U and some error epsilon less than one, there’s a circuit with depth poly(n log(one over epsilon)) and width two times O of n times poly(one over epsilon) that achieves that error Kai <ref:2610.30761#pg2,n-qubit unitary U and>. That seems like a very strong statement about parallelization Kai.

Mira: It suggests that the complexity of implementing any unitary isn't strictly limited by the depth, but rather by how quickly you can prepare those input states in parallel to achieve a certain fidelity level Mira. This shifts the focus from circuit depth alone to state preparation efficiency Mira.

Lev: For us, what this means is that we don't have to worry about sequential steps dominating the runtime as much when synthesizing these gates; instead, the bottleneck becomes generating those many independent Choi states efficiently enough for our physical qubits Lev. We’d need very fast ancillary operations if we want to use this for something like a large quantum machine learning model Lev.

Kai: The paper also mentions some elementary circuits they built for arithmetic and permutations, like sums and comparisons in polylog depth Kai. They even showed an isometry E can be implemented exactly with polylog D depth Kai. That’s pretty detailed work on the building blocks themselves Kai.

Mira: Those elementary components are helpful because they show that the underlying operations aren't just abstract gates; they are concrete things we can actually build and measure with some level of precision, even if it takes polylog time to do so Mira. It grounds this high-level parallelization idea in something tangible Mira.

Lev: For my work in error correction, seeing the depth dependence on those arithmetic operations is useful because it tells me where the computational complexity lands when we try to implement these transformations on noisy hardware Lev. If the arithmetic itself requires polylog time, that adds up quickly when you're trying to keep a system stable Lev.

Kai: So, in summary, "A simple proof of unitary parallelization via port-based teleportation" shows that by using this port-based teleportation structure and a single reflection operator, we can achieve polynomial depth for PBT Kai. This then proves that all n-qubit unitaries can be parallelized to poly(n) depth with a diamond-norm error epsilon Kai.

Title and authors: Mira: It’s about showing that the problem of implementing an arbitrary unitary U reduces to preparing a state, which we can do in parallel using standard procedures, leading to this polynomial depth implementation Mira. This is a big step because it bypasses the heavy reliance on representation theory tools that used to be needed Mira.

Lev: I see the implication for real systems as it provides a concrete framework for how to structure those parallel steps so that they fit within the constraints of actual hardware error correction protocols Lev. We need to focus on making those N independent state preparations as robust as possible because that’s where the main overhead is landing Lev.

Kai: So, moving forward, this paper gives us a very concrete path for designing circuits that can handle complex quantum operations in a parallel fashion using PBT Kai. It connects the abstract idea of unitary synthesis to a practical protocol involving reflection operators and measurement outcomes Kai.

Mira: The key thing is that the error bound they give, two times d squared minus one over N plus delta, gives us a clear metric for how well we can trust these parallelized operations Mira <ref:2610.30761#pg2>. It’s not just saying it works; it’s quantifying the quality of the result Mira.

Lev: For practical implementation, that error term tells me exactly what level of physical noise we can tolerate before the entire PBT process breaks down Lev. If that bound is too high, we just need better state preparation techniques instead of trying to fix the circuit depth itself Lev.

Kai: So, we’ve talked about how this paper proves that unitary parallelization is possible using port-based teleportation and a single reflection operator Kai. It sets the stage for how we can think about synthesizing these complex transformations in a much more efficient, parallel way Kai.

Mira: The paper "A simple proof of unitary parallelization via port-based teleportation" shows that even with the inherent limitations of physical qubits, we can still get a circuit depth that is polynomial in n Mira. This is a significant result for building larger quantum processors Mira.

Lev: I think the most important thing is that it gives us a concrete structure—the reflection operator and its associated state—that we can actually start building towards implementing on superconducting circuits Lev. It moves this from theory to something we can design hardware around Lev.

Kai: Exactly. We’ve seen how this paper provides an elementary circuit for PBT with polylogarithmic depth, which then leads to the corollary about parallelizing any n-qubit unitary in poly(n) depth Kai. It’s a simple proof that this kind of parallelization is achievable Kai.

Title and authors: Mira: So, for the listener who might be thinking about quantum computing applications, this paper shows that we can synthesize complex operations much faster than traditional sequential methods allow Mira. This speeds up the preparation of states needed for simulations and algorithms Mira.

Lev: For the real hardware side, it’s a blueprint showing us that we don't have to immediately throw away depth as the primary constraint when synthesizing these gates; state preparation efficiency becomes more important Lev. We need to focus our error correction research on making those N independent state preparations robust enough Lev.

Kai: So, looking ahead, this work opens up the idea of using PBT not just for teleportation, but as a way to build universal programmable processors where an input state can be mapped to any of N output ports without needing explicit corrections Kai. This is a pretty big concept for future hardware designs Kai.

Mira: It’s really about showing that we can achieve high fidelity in these parallel setups with quantifiable error bounds, which is something we need when we start scaling up the number of qubits involved Mira. That quantifiable error metric is what makes it useful for designing robust quantum algorithms Mira.

Lev: I think the main limitation they point out is that they are focusing on a specific structure—the single reflection operator—and while it proves parallelization, implementing that exact reflection efficiently on real hardware will still be a major engineering challenge Lev. We need to see if we can simplify that construction for actual physical systems Lev.

Kai: So, to wrap up on "A simple proof of unitary parallelization via port-based teleportation," this paper gives us an elementary circuit for PBT with polylogarithmic depth and a direct proof that all n-qubit unitaries can be parallelized to poly(n) depth Kai. It’s a simple proof that this kind of parallelization is achievable Kai.

Mira: And the implication is that we can synthesize complex operations much faster than traditional sequential methods allow by leveraging parallel state preparation Mira. This speeds up the preparation of states needed for simulations and algorithms across the board Mira.

Lev: For us, it’s a blueprint showing us how to structure those parallel steps so that they fit within the constraints of actual hardware error correction protocols Lev. We need to focus on making those N independent state preparations robust enough because that’s where the main overhead is landing Lev.

Kai: That's it for this paper. It shows us a concrete way forward in tackling unitary synthesis with parallelization through port-based teleportation Kai.

Mira: We’ll see how researchers build on this concept to make these parallel state preparations even faster and more robust for larger systems Mira.

Lev: Until the next one, we’ll be looking at what's actually built and measured versus what the theory promises Lev.

The paper's summary: Kai: So, to recap, this paper is showing us that using port-based teleportation lets you build a circuit for any n-qubit unitary in polynomial depth Kai.

Mira: Exactly, and it does this by linking the hard problem of unitaries to a simpler problem of preparing states in parallel Mira. The main thing is they use a single reflection operator on Alice's registers to achieve this PBT structure Mira.

Lev: From what I’ve seen, the result is that for any n-qubit unitary U, you can get an implementation with depth poly(n log(one over epsilon)) and width two times O of n times poly(one over epsilon) Lev. That means the circuit gets bigger as you add more qubits and more precise error control needed Lev.

Kai: It’s not just that it works, it shows that the bottleneck isn't necessarily the circuit depth itself when synthesizing these gates Kai. It shifts the focus to how fast you can prepare those many input states in parallel for your physical qubits Kai.

Mira: That’s what I find really interesting; they bypass a lot of the heavy machinery from representation theory that used to be needed for these kinds of circuits Mira. It suggests a much more accessible way to tackle unitary synthesis Mira.

Lev: For us on the hardware side, it means we need to prioritize making those N independent state preparations as robust as possible because that’s where all the overhead lands Lev. If you can’t prepare those states reliably in parallel, the circuit depth doesn't matter much anymore Lev.

Kai: So they give us a concrete blueprint for designing circuits that can handle complex quantum operations in a parallel fashion using this port-based teleportation idea Kai. It connects the abstract goal of unitary synthesis to a very specific protocol involving reflection operators and measurement outcomes Kai.

Mira: And what’s really solid about it is the error bound they provide, which is two times d squared minus one over N plus delta, where d is the local dimension and N is the number of ports Mira. That gives us a clear way to measure how good our parallelized operation actually will be Mira.

Lev: That error term tells me exactly what level of physical noise we can tolerate before the whole PBT process breaks down Lev. If that bound is too high, we just need better state preparation techniques instead of trying to fix the circuit depth itself Lev.

Kai: So, moving forward, this work opens up the idea of using PBT not just for teleportation but as a way to build universal programmable processors where an input state can be mapped to any of N output ports without needing explicit corrections Kai. That’s a big concept for future hardware designs Kai.

Mira: It’s really about showing that you can achieve high fidelity in these parallel setups with quantifiable error bounds, which is something we need when we start scaling up the number of qubits involved Mira. That quantifiable error metric makes it useful for designing robust quantum algorithms Mira.

Lev: I think the main limitation they point out is that they are focusing on a specific structure—that single reflection operator—and while it proves parallelization, implementing that exact reflection efficiently on real hardware will still be a major engineering challenge Lev. We need to see if we can simplify that construction for actual physical systems Lev.

Kai: So, to wrap up on "A simple proof of unitary parallelization via port-based teleportation," this paper gives us an elementary circuit for PBT with polylogarithmic depth and a direct proof that all n-qubit unitaries can be parallelized to poly(n) depth Kai. It’s a simple proof that this kind of parallelization is achievable Kai.

Mira: And the implication is that you can synthesize complex operations much faster than traditional sequential methods allow by leveraging parallel state preparation Mira. This speeds up the preparation of states needed for simulations and algorithms across the board Mira.

Lev: For us, it’s a blueprint showing us how to structure those parallel steps so that they fit within the constraints of actual hardware error correction protocols Lev. We need to focus on making those N independent state preparations robust enough because that’s where the main overhead is landing Lev.

Kai: That's it for this paper. It shows us a concrete way forward in tackling unitary synthesis with parallelization through port-based teleportation Kai. It sets the stage for how we can think about synthesizing these complex transformations in a much more efficient, parallel way Kai.

The paper's improvements: Kai: So, we’ve seen how they prove that unitaries can be parallelized using port-based teleportation and a reflection operator Kai. Now, what are the next steps or suggested improvements in this approach?

Mira: They suggest that this PBT method isn't just for simple teleportation; it could become a way to build universal programmable processors where you can map an input state to any of N output ports without needing any extra corrections Mira.

Lev: That’s the hardware goal, I think; designing a system where one input state can trigger one of many outputs without having to explicitly correct the resulting state at every step Lev. It moves the complexity from correction circuits to the initial preparation phase Lev.

Kai: And they also touch on how this helps with error mitigation; they show that because you have this quantifiable error bound, you get a better metric for how much noise you can trust in these parallel operations Kai.

Mira: That means we can tailor our error correction strategies specifically to the structure of port-based teleportation errors instead of just using a general approach Mira. It makes the mitigation work more targeted Mira.

Lev: For us, that’s good because it gives us a concrete number, two times d squared minus one over N plus delta, which tells me exactly what level of physical noise we can tolerate before the whole process fails Lev. That precision is what we need to design hardware around Lev.

Kai: It also mentions elementary circuits they built for things like arithmetic and permutations in polylog depth Kai. That means the building blocks themselves are efficient, which is a lot for implementation Kai.

Mira: Those elementary components are helpful because they show that the underlying operations aren't just abstract gates; they are concrete things we can actually build and measure with some level of precision Mira. It grounds this high-level parallelization idea in something tangible Mira.

Lev: I see the implication for real systems as it provides a concrete structure—the reflection operator and its associated state—that we can actually start building towards implementing on superconducting circuits Lev. That’s moving from theory to something we can design hardware around Lev.

Kai: So, looking ahead, this work opens up the idea of using PBT not just for teleportation but as a way to build universal programmable processors where an input state can be mapped to any of N output ports without needing explicit corrections Kai. It’s a pretty big concept for future hardware designs Kai.

Mira: It’s really about showing that you can achieve high fidelity in these parallel setups with quantifiable error bounds, which is something we need when we start scaling up the number of qubits involved Mira. That quantifiable error metric is what makes it useful for designing robust quantum algorithms Mira.

Lev: I think the main limitation they point out is that they are focusing on a specific structure—that single reflection operator—and while it proves parallelization, implementing that exact reflection efficiently on real hardware will still be a major engineering challenge Lev. We need to see if we can simplify that construction for actual physical systems Lev.

Kai: So, to wrap up on "A simple proof of unitary parallelization via port-based teleportation," this paper gives us an elementary circuit for PBT with polylogarithmic depth and a direct proof that all n-qubit unitaries can be parallelized to poly(n) depth Kai. It’s a simple proof that this kind of parallelization is achievable Kai.

Conclusion: Kai: So we’ve covered how this paper proves that all n-qubit unitaries can be parallelized to poly(n) depth using port-based teleportation Kai. It really boils down to showing that implementing a unitary is just a problem of preparing states in parallel Mira.

Mira: That’s right, and the implication for me is that this bypasses some of the heavy machinery from representation theory that used to be needed for these kinds of circuits Mira. It suggests a much more accessible way to tackle unitary synthesis Mira.

Lev: I agree with that; it's a lot simpler conceptually if you can reduce the problem down to state preparation rather than circuit depth constraints Lev. But on the hardware side, we still have to worry about how fast those N independent state preparations can actually happen on our physical qubits Lev.

Kai: So, for anyone listening who only cares about building real hardware, this paper gives us a blueprint for structuring those parallel steps so they fit within the constraints of actual error correction protocols Kai. It’s a pretty big concept for future hardware designs Kai.

Mira: And what I find really solid is the error bound they provide, which is two times d squared minus one over N plus delta, where d is the local dimension and N is the number of ports Mira. That gives us a clear way to measure how good our parallelized operation actually will be Mira.

Lev: That error term tells me exactly what level of physical noise we can tolerate before the whole PBT process breaks down Lev. If that bound is too high, we just need better state preparation techniques instead of trying to fix the circuit depth itself Lev.

Kai: So, moving forward, this work opens up the idea of using PBT not just for teleportation but as a way to build universal programmable processors where an input state can be mapped to any of N output ports without needing explicit corrections Kai. That’s a big concept for future hardware designs Kai.

Mira: It’s really about showing that you can achieve high fidelity in these parallel setups with quantifiable error bounds, which is something we need when we start scaling up the number of qubits involved Mira. That quantifiable error metric makes it useful for designing robust quantum algorithms Mira.

Lev: I think the main limitation they point out is that they are focusing on a specific structure—that single reflection operator—and while it proves parallelization, implementing that exact reflection efficiently on real hardware will still be a major engineering challenge Lev. We need to see if we can simplify that construction for actual physical systems Lev.

Kai: So, to wrap up on "A simple proof of unitary parallelization via port-based teleportation," this paper gives us an elementary circuit for PBT with polylogarithmic depth and a direct proof that all n-qubit unitaries can be parallelized to poly(n) depth Kai. It’s a simple proof that this kind of parallelization is achievable Kai.

Mira: And the implication is that you can synthesize complex operations much faster than traditional sequential methods allow by leveraging parallel state preparation Mira. This speeds up the preparation of states needed for simulations and algorithms across the board Mira.

Lev: For us, it’s a blueprint showing us how to structure those parallel steps so that they fit within the constraints of actual hardware error correction protocols Lev. We need to focus on making those N independent state preparations robust enough because that’s where the main overhead is landing Lev.

Kai: That's it for this paper. It shows us a concrete way forward in tackling unitary synthesis with parallelization through port-based teleportation Kai. It sets the stage for how we can think about synthesizing these complex transformations in a much more efficient, parallel way Kai.

Anurag Anshu Quynh, T. Nguyen

Harvard University · UC Berkeley

quant-ph

Submitted: 2026-10-22

Updated: 2026-10-22

License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/

The gist: The gist: This note provides an elementary efficient circuit for port-based teleportation (PBT) with polylogarithmic depth, which serves as a simple proof that all n-qubit unitaries can be

Key concepts

Port-Based Teleportation (PBT)
A variant of quantum teleportation where Alice measures an input state jointly with her halves of N shared pairs and reports a port label. This differs from standard teleportation because Bob keeps the state at his chosen port without needing any explicit correction, simplifying the process.
Unitary Parallelization
The core finding is that implementing any n-qubit unitary transformation can be done in parallel using PBT. By replacing shared entangled pairs with Choi states, these N independent preparations can occur simultaneously, leading to a circuit depth that scales polynomially with the number of qubits.
Reflection Operator (Rf)
A single reflection operator on Alice's registers is shown to be sufficient to implement the PBT protocol. This operator approximately maps an input state |Ψ⟩ to a target state |Ω⟩, which is defined using a superposition of N EPR pairs and flags. Implementing this reflection is key to achieving the desired teleportation effect.
Polylogarithmic Depth
The circuit for the reflection operator Rf can be constructed with depth polylog(N d/delta). This means the time required to perform the operation grows very slowly as N (the number of ports) and d (local dimension) increase, making this method highly efficient for large quantum systems.

Summary

The gist: This note provides an elementary efficient circuit for port-based teleportation (PBT) with polylogarithmic depth, which serves as a simple proof that all n-qubit unitaries can be parallelized to poly(n) depth.

Port-Based Teleportation (PBT)

Port-based teleportation is a variant of quantum teleportation where Alice performs a measurement and informs Bob which of his N ‘ports’ to retrieve the state, up to infidelity decaying with N<ref:2610.30761#pg2>. This method differs from ordinary teleportation by having Alice measure the input jointly with her halves of N shared pairs and report a port label i, while Bob keeps Bi and discards the other ports, with no correction on the retained state<ref:2610.30761#pg3>. The paper reports an elementary PBT circuit with depth polylog(N, d), in contrast to existing efficient circuits which have poly(N, d) depth and are more complex due to heavy reliance on representation theory<ref:2610.30761#pg3>.

Unitary Parallelization Proof

The absence of corrections in PBT allows the problem of implementing a unitary to be reduced to the problem of preparing a state<ref:2610.30761#pg2>. Replacing each shared EPR pair by the Choi state (I ⊗ U)EPRd⟩ makes the output approximately Uψ⟩<ref:2610.30761#pg2>. These N independent Choi states can be prepared in parallel using standard procedures, leading to a polynomial-depth implementation of any n-qubit unitary<ref:2610.30761#pg2>. This leads to Corollary 2, which states that for every n-qubit unitary U and 0 < ε < 1, there is a circuit of depth poly(n, log(1/ε)) and width 2O(n) poly(1/ε) that implements U to diamond-norm error ε<ref:2610.30761#pg2>.

Protocol via Single Reflection Operator

The paper shows that a single reflection operator on Alice’s registers suffices to implement PBT<ref:2610.30761#pg2>. The protocol approximates the target state omega⟩, defined as omega⟩ = d/√N LΨ⟩ = 1/√N X N i=1 f⟩CAiψ⟩Bi O j̸=i EPRd⟩AjBj<ref:2610.30761#pg3>. This is achieved by defining a reflection operator Rf that approximately maps Ψ⟩ to omega⟩, where Fact 2.1 states that if a reflection R fixes Ψ⟩ + omega⟩ and negates Ψ⟩ − omega», then RΨ» = omega»<ref:2610.30761#pg3>.

Implementing the Reflection

To construct the required reflection, a superposition over the EPR state and its flag is defined as β⟩ = EPRd⟩ + √µ f⟩, Sf = X N i=1 β⟩⟨βCAi<ref:2610.30761#pg3>. By choosing µ = N/d2, Lemma 3 shows that the protocol implements a channel Tf satisfying∥Tf − id∥⋄ ≤ 2(d squared − 1)/N for every N ≥ 1<ref:2610.30761#pg2>. This bound is derived from Claim 2.3, which shows that choosing µ = N/d2 gives Sf (Ψ⟩ − omega») = 0 and Sf 2µ− I(Ψ⟩ + omega»)=d squared − 1/N<ref:2610.30761#pg2>.

Polylogarithmic Depth Implementation

Lemma 4 demonstrates that the reflection Rf can be implemented in polylog depth with diamond error at most δ, with depth polylog(N d/δ) and width poly(N, d, log(1/δ))<ref:2610.30761#pg2>. This is achieved by expressing Sf as a sum of swap operators under a change of basis on the (enlarged) input register C<ref:2610.30761#pg2>. The key steps involve extracting eigenvalues of Sf using random SWAP tests in polylogarithmic depth, and then computing the required arithmetic operations to implement Rf<ref:2610.30761#pg2>.

Final Circuit Assembly

Theorem 1 combines these results by implementing Rf to diamond error δ using Lemma 4<ref:2610.30761#pg2>. Alice then identifies the flagged port i (or 0 if none; breaking tie by choosing smalles port index), and Bob exchanges his port i with port 1, doing nothing for label 0<ref:2610.30761#pg2>. This results in Bob’s output being his port 1, with a overall diamond norm bound of 2(d squared − 1)/N + δ<ref:2610.30761#pg2>. Corollary 2 is then proven by applying Theorem 1 with Choi state resources, yielding a circuit of depth poly(n, log(1/ε)) and width 2O(n) poly(1/ε)<ref:2610.30761#pg2>.

Elementary Parallel Circuits

The paper also provides elementary circuits for arithmetic and permutations<ref:2610.30761#pg4>. These include sums, comparisons, and minima of L b-bit integers in depth polylog(Lb) and width poly(L, b)<ref:2610.30761#pg4>, controlled swaps in depth O(log r), multiplying permutations in depth polylog(rL), and applying permutations in depth polylog(rD) and width poly(r, log D)<ref:2610.30761#pg4>. Furthermore, the isometry E from Section 3.1 can be implemented exactly in depth polylog D and width poly(D)<ref:2610.30761#pg5>. This is done by preparing uniform superpositions and using arithmetic circuits to compute the required list representations of permutations<ref:2610.30761#pg5>. The paper concludes by showing that the combined diamond-norm errors from eigenvalue extraction procedures add up to implement Rf up to diamond error δ<ref:2610.30761#pg2>.

Acknowledgement

AA acknowledges support through the NSF Award Nos. 2238836, 2430375 and QCIS-FF: Quantum Computing & Information Science Faculty Fellow at Harvard University (NSF 2013303)<ref:2610.30761#pg2>.

--- Page 1 ---

The gist: This note provides an elementary efficient circuit for port-based teleportation (PBT) with polylogarithmic depth, which serves as a simple proof that all n-qubit unitaries can be parallelized to poly(n) depth.

Protocol via Single Reflection Operator

The paper shows that a single reflection operator on Alice’s registers suffices to implement PBT<ref:2610.30761#pg2>. The protocol approximates the target state omega⟩, defined as omega⟩ = d/√N LΨ⟩ = 1/√N X N i=1 f⟩CAiψ⟩Bi O j̸=i EPRd⟩AjBj<ref:2610.30761#pg3>. This is achieved by defining a reflection operator Rf that approximately maps Ψ» to omega»<ref:2610.30761#pg3>.

Implementing the Reflection

To construct the required reflection, a superposition over the EPR state and its flag is defined as β⟩ = EPRd⟩ + √µ f⟩, Sf = X N i=1 β⟩⟨βCAi<ref:2610.30761#pg3>. By choosing µ = N/d2, Lemma 3 shows that the protocol implements a channel Tf satisfying∥Tf − id∥⋄ ≤ 2(d squared − 1)/N for every N ≥ 1<ref:2610.30761#pg2>. This bound is derived from Claim 2.3, which shows that choosing µ = N/d2 gives Sf (Ψ» - omega») = 0 and Sf 2µ− I(Ψ» + omega»)=d squared − 1/N<ref:2610.30761#pg2>.

Improvements for AI systems

  1. Parallel Unitary Synthesis for AI Models: The corollary suggests a circuit of depth poly(n, log(1/epsilon)) and width 2 O(n) poly(1/epsilon) can implement an arbitrary n-qubit unitary U with diamond-norm error epsilon. This allows AI systems to synthesize complex, high-dimensional unitary transformations necessary for advanced neural network layers or quantum machine learning algorithms in a parallel manner.

  2. Efficient Quantum State Preparation: The paper shows that N independent Choi states can be prepared in parallel using standard procedures, leading to a polynomial-depth implementation of any n-qubit unitary. This capability enables the preparation of complex quantum states required for quantum simulation or variational algorithms faster than traditional sequential methods.

  3. Port-Based Teleportation for Programmable Processors: The elementary circuit achieves depth polylog(N d/delta) and width poly(N, d, log(1/delta)) for PBT with N ports and local dimension d. This directly supports the creation of universal programmable processors where a single input state can be mapped to any of N output ports without requiring explicit corrections on the teleported state.

  4. Low-Depth Eigenvalue Extraction: The protocol implements a channel Tf satisfying Tf - id diamond <= 2(d squared - 1)/N, which bounds entanglement infidelity. This allows for the extraction of key spectral information from quantum operations with high fidelity in polylogarithmic depth, useful for rapid characterization of quantum gates or Hamiltonian evolution.

  5. Quantum Error Mitigation and Robustness: By bounding the diamond error to 2(d squared - 1)/N + delta, the system provides a quantifiable measure of performance degradation due to parallelization and approximation errors. This allows AI systems utilizing these quantum primitives to develop more robust error mitigation strategies tailored to the specific structure of port-based teleportation.

Sources

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